1. Technical Field
The present disclosure relates to a switch control circuit that adjusts a control clock for a circuit that is controlled by ON/OFF of a switch, and a circuit and a wireless device using the switch control circuit. For example, the present disclosure relates to signal processing, including frequency conversion or filtering, in which signal characteristics are changed by adjustment of a clock.
2. Description of the Related Art
A mixer comprising a switch is known as a circuit that converts a frequency in a wireless device. It is known that the characteristics of a mixer can be improved by appropriately setting a duty ratio (=pulse width Ts/clock cycle TCK) of a local signal to be supplied to the switch.
Furthermore, a discrete-time analog circuit that comprises a switch and a capacitor is known as a highly variable circuit that is suitable for design in a fine CMOS process. The characteristics of the discrete-time analog circuit are controlled by a clock supplied to the switch.
In any of the circuits, time periods of ON and OFF of the switch need be adjusted to desired values.
For example, A. Mirzaei, H. Darabi, J. C. Leete, X. Chen, K. Juan, and A. Yazdi, “Analysis and optimization of current-driven passive mixers in narrowband direct-conversion receivers,” IEEE J. Solid-State Circuits, vol. 44, no. 10, pp. 2678-2688, October 2009 (hereinafter referred to as Non-Patent Literature 1) describes a configuration of a mixer in which clocks of four phases having a duty ratio of 25% are used as local signals and a circuit that generates clocks having a duty ratio of 25%.
FIG. 1A is a diagram illustrating an outline of the mixer using clocks having a duty ratio of 25% that is disclosed in Non-Patent Literature 1, and FIG. 1B is a diagram illustrating an example of the clock generating circuit that generates clocks having a duty ratio of 25% that is disclosed in Non-Patent Literature 1.
The clock generating circuit illustrated in FIG. 1B generates clocks of four phases that has a duty ratio of 50% and whose phases are shifted by 90 degrees from a signal generated by a synthesizer and obtains clocks having a duty ratio of 25% by performing an AND operation between two of the generated clocks of four phases having a duty ratio of 50%.
It is necessary to increase the clock frequency of a clock supplied to a circuit in order that a mixer, a discrete-time analog circuit, or the like operates at a high frequency.
However, in the clock generating circuit disclosed in Non-Patent Literature 1, it is highly likely that in a case where the clock frequency is increased, the duty ratio of the clock falls below 25% because the waveform of a signal generated by a synthesizer is rounded.
For example, in the clock generating circuit illustrated in FIG. 1B, there is no output of AND (i.e., the result of AND operation is zero) unless two signals that are input to AND exceed a certain threshold value. Therefore, as the degree of rounding of the waveform of the clocks having a duty ratio of 50% which are input signals becomes higher, the duty ratio of output signals becomes smaller than 25%, and in some cases, the output signals do not reach a necessary voltage value. This results in a situation in which it is difficult for a circuit to which the clocks are supplied to operate at a high frequency.